HDL IP Cores

During the years ECoCoMS obtained a large experience in the development and application of VLSI in the aria of communication as well other areas of the industrial automatization. And also has created a lot of Intellectual Property (IP) in the area of cores.

Starting in 1990 with the Xilinx programmable logics - FPGA (Field Programmable Gate Array's), going through different form of design (Schematics Editors, EDIF and etc.) nowadays ECoCoMS is using most sophisticated HDL's like Verilog and VHDL generating portable sources for different FPGA vendors. The design teams in ECoCoMS close the design cycle from specification via verification, testing and etc in different arias but mainly in the communication aria. Nowadays the average density is about 1000000 gates-equivalent and speed about 300MHz.

Using the obtained know-how in all of the projects created in ECoCoMS, exist at least couple Xilinx FPGA designs. This approach determines the success stories of ECoCoMS on the telecom market in Bulgaria and abroad. This can be seen by the presented equipment on the other pages in this site.

Here there are some of the projects developed by ECoCoMS:

PCI IP Core for interfacing 32 bit PCI computer bus.
HDLC IP Core for implementing in FPGA one or more HDLC controllers. The core supports interface to different microcontrollers for reading and writing into HDLC Controller.
USB 1.1 Function IP Core to connect hosts using specification USB 1.1.
ReedSolomon IP Core с transmitter and receiver with different generation polynomials in different Galois fields. A Perl based software for automatic generation of the core with given initial parameters is available.
Interleaver/Deinterleaver IP Core with different size of the working block for interworking with the ReedSolomon IP Core.
Different TDM Controller IP Cores - these controllers allow to interconnect different TDM busses with different speeds.
Serial UART IP Core - extend the number of UART's seen by standard computers and etc.
E1 Framer/Deframer IP Core
E2 Framer/Deframer IP Core
E3 Framer/Deframer IP Core
HDB3/AMI IP Core encoder/decoder.
SDRAM Controller IP Core - Controller for SDRAM memories.
DFS Controller IP Core - Digital Frequency Synthesis (DFS) controller and smooth changing of frequencies without phase jumps.
DFFT Processor IP Core - Perform Digital Fast Fourier Transform with various size and speed.
ISA Controller IP Core - Controller conforming the specifications and timing of the ISA computer bus for PC104 systems.
Clock Recovery IP Core - Different kind of IP cores for clock recovery in the range of 64kHz - 155MHz.
CVSD2PCM Converter IP Core - Digital converter from CVSD delta modulation to PCM encoding.
STM-1 Assembler/Disassembler IP Core